CSRC will be hosting a 2-day short-course on “Mixed Signal IC Design” by Prof. Klass Bult (TU Delft) at University of Limerick on 14th & 15th June 2018.
Klaas Bult is a world-renowned distinguished lecturer, Broadcom Fellow, IEEE Fellow and multi-award winner at ISSCC. The course content is brand new and based on recent talks delivered at ISSCC 2018, AACD 2018 and MEAD 2017.
The focus this year will be Data Converters in SoC/Embedded environments with high-performance & energy-efficient targets. There will also be two after-lunch guest lectures on state-of-the-art automotive topics: “AI & Autonomous Cars” and “Automotive Radar”.
Course: Selected Topics in Mixed-Signal IC Design
Main Topics: Power-efficient, high-performance ADCs & DACs in SoC/Embedded Environments
Instructor: Prof. Klaas Bult (Delft University of Technology)
Details: See attached flyer
Location: University of Limerick, Limerick, Ireland
Dates: Thur. 14th & Fri. 15th, June 2018 (2 full days)
Fees*: €450 (Early-Bird Payment before 27th April 2018)
€550 (Standard Payment after 30th April 2018)
*includes hard-copy course notes & lunch/refreshments on both days
For registration please contact Hooman Reyhani (email@example.com) and/or +353-86-8242676.